Design and characterization of the BVX An 8-channel CMOS preamplifier-shaper for silicon strips
This paper presents the design and characterization of an 8channel preamplifier-shaper intended for use with silicon strip detectors ranging in capacitance from 1 to 20pF. The nominal peaking time of the circuit is 200ns with an adjustment range of ±50ns. The circuit has a pitch (width) of 84[mu]channel with a power dissipation of 1.2mW/channel and has been fabricated in 2[mu]m p-well CMOS. The 0pF noise is 330e with a noise slope of 64e/pF. The design approach is presented as well as both test bench and strip detector measurements.
"This paper presents the design and characterization of an 8channel preamplifier-shaper intended for use with silicon strip detectors ranging in capacitance from 1 to 20pF. The nominal peaking time of the circuit is 200ns with an adjustment range of ±50ns. The circuit has a pitch (width) of 84[mu]channel with a power dissipation of 1.2mW/channel and has been fabricated in 2[mu]m p-well CMOS. The 0pF noise is 330e with a noise slope of 64e/pF. The design approach is presented as well as both test bench and strip detector measurements."@en
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United States. Department of Energy. Office of Scientific and Technical Information.
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Instrumentation Related To Nuclear Science And Technology.
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