<http://worldcat.org/entity/work/id/20665622> <http://schema.org/workExample> <http://www.worldcat.org/oclc/27431472> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/workExample> <http://www.worldcat.org/oclc/365226143> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/workExample> <http://www.worldcat.org/oclc/695545521> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://id.loc.gov/authorities/subjects/sh88007957> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/memoria_rapida_de_treball_informatica> .
<http://worldcat.org/entity/work/id/20665622> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/CreativeWork> .
<http://worldcat.org/entity/work/id/20665622> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Book> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/name> "The cache-coherence problem in shared-memory multiprocessors" .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/pufferspeicher> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/name> "The Cache-coherence problem in shared-memory multiprocessors hardware solutions"@en .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/name> "The cache coherence problem in shared-memory multiprocessors : hardware solutions" .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://id.worldcat.org/fast/843680> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/creator> <http://worldcat.org/entity/person/id/2639051650> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/contributor> <http://worldcat.org/entity/person/id/2639051650> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/multiprocessadors> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/ordinadors_arquitectura> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://id.loc.gov/authorities/subjects/sh85088386> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/mehrprozessorsystem> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/name> "The Cache-coherence problem in shared-memory multiprocessors : hardware solutions" .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/workExample> <http://www.worldcat.org/oclc/654318120> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/contributor> <http://worldcat.org/entity/person/id/2713446518> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://id.worldcat.org/fast/1029068> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/memoria_cau> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/aufsatzsammlung> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/name> "The Cache coherence problem in shared-memory multiprocessors : hardware solutions" .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/ordinadors_memories_optiques> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/about> <http://experiment.worldcat.org/entity/work/data/20665622#Topic/antememoire_multiprocesseur> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/workExample> <http://www.worldcat.org/oclc/803031969> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/contributor> <http://worldcat.org/entity/person/id/2641476484> .
<http://worldcat.org/entity/work/id/20665622> <http://schema.org/workExample> <http://www.worldcat.org/oclc/300355895> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/memoria_cau> <http://schema.org/name> "Memòria cau." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/memoria_cau> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/memoria_rapida_de_treball_informatica> <http://schema.org/name> "Memòria ràpida de treball (Informàtica)" .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/memoria_rapida_de_treball_informatica> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/mehrprozessorsystem> <http://schema.org/name> "Mehrprozessorsystem." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/mehrprozessorsystem> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/multiprocessadors> <http://schema.org/name> "Multiprocessadors." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/multiprocessadors> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/aufsatzsammlung> <http://schema.org/name> "Aufsatzsammlung." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/aufsatzsammlung> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/pufferspeicher> <http://schema.org/name> "Pufferspeicher." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/pufferspeicher> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/ordinadors_arquitectura> <http://schema.org/name> "Ordinadors Arquitectura." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/ordinadors_arquitectura> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/antememoire_multiprocesseur> <http://schema.org/name> "antémémoire multiprocesseur." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/antememoire_multiprocesseur> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/ordinadors_memories_optiques> <http://schema.org/name> "Ordinadors Memòries òptiques." .
<http://experiment.worldcat.org/entity/work/data/20665622#Topic/ordinadors_memories_optiques> <http://www.w3.org/1999/02/22-rdf-syntax-ns#type> <http://schema.org/Topic> .
<http://experiment.worldcat.org/entity/work/data/20665622.nt> <http://rdfs.org/ns/void#inDataset> <http://purl.oclc.org/dataset/WorldCat/Works> .
<http://experiment.worldcat.org/entity/work/data/20665622.nt> <http://schema.org/about> <http://worldcat.org/entity/work/id/20665622> .